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Design and fpga implementation of signal processing systems (Record no. 1848801)

MARC details
000 -LEADER
fixed length control field	00661nam a2200241Ia 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field	20260430150036.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field	008 250103s9999 xx 000 0 eng d
037 ## - SOURCE OF ACQUISITION
Stock number	Theses
040 ## - CATALOGING SOURCE
Original cataloging agency	CRL
040 ## - CATALOGING SOURCE
Language of cataloging	eng
040 ## - CATALOGING SOURCE
Transcribing agency	eng
041 ## - LANGUAGE CODE
Source of code	eng
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title	eng
084 ## - COLON CLASSIFICATION NUMBER
Assigning agency	CRL
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name	Sharma Abhay Au.; Rawat Tarun Kumar Gu.
9 (RLIN)	1236276
245 #0 - TITLE STATEMENT
Title	Design and fpga implementation of signal processing systems
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Date of publication, distribution, etc.	2021
300 ## - PHYSICAL DESCRIPTION
Extent	103p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element	Technology
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name	University of Delhi. Faculty of Technology. Department of Electronics and communication Engineering
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type	Thesis

Holdings
Withdrawn status	Lost status	Damaged status	Not for loan	Home library	Current library	Date acquired	Total Checkouts	Barcode	Date last seen	Price effective from	Koha item type
				Central Library	Central Library	2026-04-30		TH0025773	2026-04-30	2026-04-30	Thesis