000 00639nam a2200205Ia 4500
005 20260114154727.0
008 008 250103s9999 xx 000 0 eng d
037 _aTheses
040 _aCRL
_beng
_cCRL
041 _aeng
_2eng
084 _qCRL
100 _aSharma Abhay Au.
_9865015
245 0 _aDesign and fpga implementation of signal processing systems
260 _aDelhi
_bUniversity of Delhi. Faculty of Technology. Department of Electronics and communication Engineering
_c2021
300 _a103p.
650 _aTechnology
_9865016
700 _a Rawat Tarun Kumar Gu.
_9865017
942 _cTH
999 _c1467863
_d1467863