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| 005 | 20220930062020.0 | ||
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| 024 | _a545 | ||
| 037 | _cTheses | ||
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_aCRL _cCRL _beng |
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| 041 |
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| 100 |
_aBhaskar Data Ram _9520296 |
||
| 110 |
_aUniversity of Delhi. Faculty of Technology. Department of Electrical Engineering _9520297 |
||
| 245 | 0 | _aRealizationof a class of electronically-controllable singnal processing/signal generation circuits | |
| 260 | _c1993 | ||
| 650 | _aELECTRICAL ENGINEERING | ||
| 700 |
_aUniversity of Delhi. Faculty of Technology. Department of Electrical Engineering _9520298 |
||
| 942 |
_cDIS _2CC |
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| 999 |
_c854966 _d854966 |
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