000 01009nam a2200277Ia 4500
003 OSt
005 20220930091818.0
006 a|||||r|||| 00| 0
007 ta
008 220926b |||||||| |||| 00| 0 eng d
024 _a10206
037 _cTheses
040 _aCRL
_cCRL
_beng
041 _2eng
_aeng
100 _aGhosh Pujarini Au.
_9546777
110 _aUniversity of Delhi. Faculty of Inter-displinary and Applied Sciences. Department of Electronic Science
245 0 _aAnalytical modeling and simulation of dual material gate stack archiedture cylindrical / surrounded gate MOSFETs
260 _c2013
300 _a387p.
_ap.
_ccm.
650 _aELECTRICAL ENGINEERING
700 _a Gupta Mridula Gu.
_9543365
700 _a Haldar Subhasis Gu.
_9543366
700 _aUniversity of Delhi. Faculty of Inter-displinary and Applied Sciences. Department of Electronic Science
942 _cDIS
_2CC
999 _c882685
_d882685