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| 005 | 20220930091842.0 | ||
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| 024 | _a10698 | ||
| 037 | _cTheses | ||
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_aCRL _cCRL _beng |
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| 041 |
_2eng _aeng |
||
| 100 |
_aPandey Rajeshwari _9546926 |
||
| 110 | _aUniversity of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering | ||
| 245 | 0 | _aSignal processing and generating circuits using otra as a building block | |
| 260 | _c2013 | ||
| 650 | _aTECHNOLOGY | ||
| 700 |
_a Pandey Neeta Gu. _9546927 |
||
| 700 | _aUniversity of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering | ||
| 942 |
_cDIS _2CC |
||
| 999 |
_c882772 _d882772 |
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