APA

Singh Kunwar Au, University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering, Gupta Maneesha Gu & University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering. (2015). Design and optimization of digital cmos integrated circuits for minimum power-delay-area product. : .

Chicago

Singh Kunwar Au, University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering, Gupta Maneesha Gu and University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering. 2015. Design and optimization of digital cmos integrated circuits for minimum power-delay-area product. : .

Harvard

Singh Kunwar Au, University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering, Gupta Maneesha Gu and University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering. (2015). Design and optimization of digital cmos integrated circuits for minimum power-delay-area product. : .

MLA

Singh Kunwar Au, University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering, Gupta Maneesha Gu and University of Delhi. Faculty of Technology. Department of Electronics and Communication Engineering. Design and optimization of digital cmos integrated circuits for minimum power-delay-area product. : . 2015.